@inproceedings{MTMT:2943012,
	title = {C-GEP: 100 Gbit/s Capable, FPGA-based, Reconfigurable Networking Equipment},
	url = {https://m2.mtmt.hu/api/publication/2943012},
	author = {Varga, Pál and László, Kovács and Tóthfalusi, Tamás and Orosz, Péter},
	booktitle = {High Performance Switching and Routing (HPSR), 2015 IEEE 16th International Conference on},
	doi = {10.1109/HPSR.2015.7483084},
	unique-id = {2943012},
	abstract = {Programmable networking platforms are in the spotlight since the advent of SDN (Software Defined Networking). It is a great challenge to create such a platform-especially with reconfigurable hardware and line-rate capabilities reaching and exceeding 100 Gbit/s. These requirements together put FPGA (Field Programmable Gate Array) technology into the focus of high performance networking. In this paper, we introduce a highly flexible, programmable, multipurpose networking platform , which is capable of hosting multiple 1 and 10 Gbit/s Ethernet interfaces-beside their 40 or 100 Gbit/s interface. The hardware of the introduced C-GEP platform is reconfigurable, even on-the-fly; due to the FPGA technology. C-GEP can host a wide range of high-speed network specific applications – including monitoring, switching and media conversion –, and it is aligned with the SDN principles. The system consists of two main building blocks: a high performance FPGA-based custom specific hardware platform and the firmware tailored to the actual task. The architecture is briefly introduced by its hardware and firmware setup, then some of the core functionalities, such as packet processing, filtering, and switching are presented.},
	year = {2016},
	pages = {1-6}
}

@inproceedings{MTMT:2943018,
	title = {100 Gbit/s network monitoring with on-the-fly reconfigurable rules for multi-encapsulated packets},
	url = {https://m2.mtmt.hu/api/publication/2943018},
	author = {Tóthfalusi, Tamás and László, Kovács and Orosz, Péter and Varga, Pál},
	booktitle = {High Performance Switching and Routing (HPSR), 2015 IEEE 16th International Conference on},
	doi = {10.1109/HPSR.2015.7483096},
	unique-id = {2943018},
	abstract = {Before the advent of FPGAs (Field Programmable Gate Arrays), hardware acceleration of networking equipment has been implemented through static architectural elements. The new generations of these highly flexible FPGA architectures can be reconfigured on-the-fly, allow parallel processing of data arriving at high-speed, and even contain hundreds of DSPs (Digital Signal Processors), to further parallelize certain, computationally intensive tasks. This paper demonstrates some of the capabilities of a new, FPGA-based networking platform, C-GEP. This multi-purpose, programmable platform can support various tasks, from being a high-speed switch/router, through pre-processing packets for Deep Packet Inspection, towards being the Forwarding Plane element in the SDN infrastructure. The current demonstration contains two further implementations of 100 Gbit/s-capable applications: a traffic generator -- firing off multi-encapsulated packets - and a lossless traffic monitor - that is able to classify and steer the monitored traffic to further post-processors.},
	year = {2016}
}

@inproceedings{MTMT:2942971,
	title = {C-GEP: Adaptive Network Management with Reconfigurable Hardware},
	url = {https://m2.mtmt.hu/api/publication/2942971},
	author = {Orosz, Péter and Tóthfalusi, Tamás and Varga, Pál},
	booktitle = {2015 IFIP/IEEE International Symposium on Integrated Network Management (IM)},
	doi = {10.1109/INM.2015.7140417},
	unique-id = {2942971},
	abstract = {Carrying out network monitoring tasks remains a continuous challenge, partially because the line rate reaches and exceeds 100 Gbit/s. Besides the increasing data rate, the advent of programmable networks necessitates efficient solutions for supporting packet processing tasks in an adaptive way. Introducing a modification of a protocol or any new protocol in such a flexible infrastructure implies a novel management approach incorporating network monitoring equipment with reconfigurable architecture. The requirement for high throughput and high level of reconfiguration together put Field Programmable Gate Array (FPGA) technology into the focus of high performance networking. In this paper, we introduce a programmable, multi-purpose network platform called C-GEP that is based on a reconfigurable architecture. The system consists of two main building blocks: a high performance FPGA-based custom hardware platform and a firmware dedicated for network monitoring. We present the architecture focusing on the system-level integration of specific packet processors. The integration of processing building blocks into one high performance system has great challenges. These are primarily related to specific, limiting factors of system resources – which we discuss also in this paper.},
	keywords = {Network management; traffic analysis; Reconfigurable hardware; Field Programmable Gate Array; 100 Gbit/s Ethernet; network monitoring},
	year = {2015},
	pages = {954-959}
}

@article{MTMT:2845657,
	title = {Efficient Methods for Early Protocol Identification},
	url = {https://m2.mtmt.hu/api/publication/2845657},
	author = {Hullár, Béla and Laki, Sándor and György, András},
	doi = {10.1109/JSAC.2014.2358832},
	journal-iso = {IEEE J SEL AREA COMM},
	journal = {IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS},
	volume = {32},
	unique-id = {2845657},
	issn = {0733-8716},
	abstract = {To manage and monitor their networks in a proper way, network 
		operators are often interested in automatic methods that 
		enable them to identify applications generating the traffic 
		traveling through their networks as fast (i.e., from the 
		first few packets) as possible. State-of-the-art packet-based 
		traffic classification methods are either based on costly 
		inspection of the payload of several packets in each flow or 
		on basic flow statistics without taking into account the 
		packet content. In this paper, we consider an intermediate 
		approach of analyzing only the first few bytes of the first 
		(or first few) packet(s) of each flow and propose automatic, 
		machine-learning-based methods with very low computational 
		complexity and memory footprint. The performance of these 
		techniques are thoroughly analyzed, showing that outstanding 
		early classification accuracy can be achieved on traffic 
		traces generated by a diverse set of applications (including 
		P2P TV and file sharing) in a laboratory environment as well 
		as on a real-world data set collected in the network of a 
		large European ISP.},
	year = {2014},
	eissn = {1558-0008},
	pages = {1907-1918},
	orcid-numbers = {Laki, Sándor/0000-0002-8875-5330}
}

@inproceedings{MTMT:2693520,
	title = {Automatic Protocol Signature Generation Framework for Deep Packet Inspection},
	url = {https://m2.mtmt.hu/api/publication/2693520},
	author = {Szabó, Géza and Turányi, Z and Toka, László and Molnár, Sándor and Santos, A},
	booktitle = {VALUETOOLS 2011},
	doi = {10.4108/icst.valuetools.2011.245606},
	unique-id = {2693520},
	year = {2011},
	pages = {291-299},
	orcid-numbers = {Toka, László/0000-0003-1045-9205}
}

@article{MTMT:2644602,
	title = {Survey on Internet Traffic Identification},
	url = {https://m2.mtmt.hu/api/publication/2644602},
	author = {Arthur, Callado and Carlos, Kamienski and Stenio, Fernandes and Djamel, Sadok and Szabó, Géza and Balazs, Peter Gero},
	doi = {10.1109/SURV.2009.090304},
	journal-iso = {IEEE COMMUN SURV TUTOR},
	journal = {IEEE COMMUNICATIONS SURVEYS AND TUTORIALS},
	volume = {11},
	unique-id = {2644602},
	issn = {1553-877X},
	year = {2009},
	eissn = {2373-745X},
	pages = {37-52}
}