TY - CHAP AU - Kerecsen Istvánné Rencz, Márta AU - Farkas, Gábor AU - Sárkány, Zoltán AU - Vass-Várnai, András ED - Kerecsen Istvánné Rencz, Márta ED - Farkas, Gábor ED - Poppe, András TI - The Use of Thermal Transient Testing T2 - Theory and Practice of Thermal Transient Testing of Electronic Components PB - Springer Netherlands CY - Cham SN - 9783030861742 PY - 2022 SP - 319 EP - 352 PG - 34 DO - 10.1007/978-3-030-86174-2_7 UR - https://m2.mtmt.hu/api/publication/33589490 ID - 33589490 N1 - Siemens Digital Industry Software STS, Budapest, Hungary Budapest University of Technology and Economics, Budapest, Hungary Siemens Digital Industry Software, Plano, TX, United States Export Date: 1 June 2023 Correspondence Address: Rencz, M.; Siemens Digital Industry Software STSHungary; email: rencz.marta@vik.bme.hu LA - English DB - MTMT ER - TY - CHAP AU - Farkas, Gábor AU - Poppe, András AU - Sárkány, Zoltán AU - Vass-Várnai, András ED - Kerecsen Istvánné Rencz, Márta ED - Farkas, Gábor ED - Poppe, András TI - Thermal Transient Measurements on Various Electronic Components T2 - Theory and Practice of Thermal Transient Testing of Electronic Components PB - Springer Netherlands CY - Cham SN - 9783030861742 PY - 2022 SP - 209 EP - 318 PG - 110 DO - 10.1007/978-3-030-86174-2_6 UR - https://m2.mtmt.hu/api/publication/33589441 ID - 33589441 N1 - Siemens Digital Industry Software STS, Budapest, Hungary Budapest University of Technology and Economics, Budapest, Hungary Siemens Digital Industry Software, Plano, TX, United States Export Date: 1 June 2023 Correspondence Address: Farkas, G.; Siemens Digital Industry Software STSHungary; email: Gabor.Farkas@siemens.com LA - English DB - MTMT ER - TY - CHAP AU - Wong, Voon Hon AU - Vass-Várnai, András AU - Caruso, Antonio AU - Cho, Young Joon AU - Lee, Yong Seoung AU - Lee, Kwon Hyung TI - Rapid Assessment of Semiconductor Thermal Quality T2 - 2021 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) SN - 9781665439886 PY - 2021 SP - 1 EP - 6 PG - 6 DO - 10.1109/IPFA53173.2021.9617427 UR - https://m2.mtmt.hu/api/publication/32765962 ID - 32765962 N1 - ISSN:1946-1550 AB - The performance and reliability of an IC Package will be affected by die attach defects such as voids, cracks and delaminations. In this paper, a novel Thermal Quality Tester is presented. It allows for non-intrusive and non-destructive tests of the samples within a very short period of time. Thermal transient tests are used to determine the thermal impedance and structure function curves of the samples. The samples can then be binned according to their thermal performance. Thermal simulations of the samples are used to provide information for the binning process. The concepts for this tester will be presented along with test sample measurements. LA - English DB - MTMT ER - TY - CHAP AU - Wong, Voon Hon AU - Vass-Várnai, András AU - Caruso, Antonio AU - Hara, Tomoaki AU - Hsu, Alvin AU - Wang, Gang TI - Detection Of Die Attach Defects Through Rapid Thermal Transient Tests T2 - 2021 International Conference on Electronics Packaging (ICEP) SN - 9784991191114 PY - 2021 SP - 117 EP - 118 PG - 2 DO - 10.23919/ICEP51988.2021.9451916 UR - https://m2.mtmt.hu/api/publication/32765939 ID - 32765939 AB - The presence die attach defects such as voids and delaminations in a semiconductor device will lead to increased junction temperatures and premature failure of the device. In this paper, a thermal quality testing method is presented which allows for the rapid detection of die attach defects and sorting of the production samples. The methodology is a combination of thermal transient tests for thermal characterization and 3D CFD simulations. LA - English DB - MTMT ER - TY - CHAP AU - Poppe, András AU - Vass-Várnai, András AU - Sárkány, Zoltán AU - Kerecsen Istvánné Rencz, Márta AU - Hantos, Gusztáv AU - Farkas, Gábor ED - Vadim, Tsoi ED - Lorenzo, Codecasa ED - Bernhard, Wunderle TI - Suggestions for Extending the Scope of the Transient Dual Interface Method T2 - Proceedings of the 27th International Workshop on THERMal INvestigations of ICs and Systems (THERMINIC'21 online) PB - IEEE CY - Piscataway (NJ) SN - 9781665418973 PY - 2021 SP - 23 EP - 30 PG - 8 DO - 10.1109/THERMINIC52472.2021.9626508 UR - https://m2.mtmt.hu/api/publication/32236544 ID - 32236544 AB - A decade ago the JEDEC JESD51-14 standard was a real breakthrough in the thermal measure¬ments of semiconductor devices. This standard introduces the Transient Dual (thermal) Interface Method (TDIM) for the measurement of the junction to case thermal resistance (RthJC) of power device packages with a single dominant heat-flow path through an exposed cooling surface. The recommendations of the standard are based on experiences obtained from many numerical and physical experiments performed typically on power devices in small packages such as TO types. The precise test procedure descriptions, however, seem to be too restrictive for large modules, power LED constructions and other. The aim of this paper is to examine package types for which a TDIM based RthJC measurement is feasible and to identify how the recommendations of the present JESD51-14 standard could be extended to these package types, keeping the merits of the present methodology. Moreover, it is investigated how the TDIM method can be extended to the measurement of other standard thermal metrics, such as the junction to pin thermal resistance. LA - English DB - MTMT ER - TY - CHAP AU - Vass-Várnai, András AU - Cho, Y.J. AU - Farkas, Gábor AU - Kerecsen Istvánné Rencz, Márta ED - IPEC, - ECCE Asia ED - Sangyō, Ōyō Bumon ED - IEEE, Power Electronics Society ED - IEEE, Industry Applications Society TI - An Alternative Method to Accurately Determine the Thermal Resistance of SiC MOSFET Structures with Discrete Diodes T2 - 2018 INTERNATIONAL POWER ELECTRONICS CONFERENCE (IPEC-NIIGATA 2018 -ECCE ASIA) PB - IEEE CY - Piscataway (NJ) SN - 9784886864055 PY - 2018 SP - 137 EP - 141 PG - 5 DO - 10.23919/IPEC.2018.8507995 UR - https://m2.mtmt.hu/api/publication/31322686 ID - 31322686 N1 - Mechanical Analysis Division, Mentor Graphics, Seoul, South Korea Mechanical Analysis Division, Mentor Graphics, Budapest, Hungary Department of Electron Device Budapest, University of Technology and Economics, Budapest, Hungary Cited By :1 Export Date: 24 May 2020 ISSN:2150-6078 AB - To determine the thermal properties of power semiconductor devices and structures, the JEDEC JESD 51-1 static, electrical test method is a well-known and industry-wide accepted technique. The approach provides accurate and repeatable results in case of silicon based transistors in all cases. For certain compound semiconductor components, such as SiC MOSFET-s and GaN HEMT structures, the application of the electrical test method becomes in some cases challenging. If traditional test setups are used, in the unit step response function, due to parasitic effects, an electric signal may superpose on the thermal signal of interest, making it hard or even impossible to analyze the test results. If the structure has a physical diode as well, it can be used to understand the thermal properties of the package and its layers. This information can be applied in another step to gather the thermal properties from die transistors' point of view as well, without measuring it. In this article we show a combined measurement and simulation based method, which allows the accurate thermal characterization of such components, even in cases when other approaches may fail. © 2018 IEEJ Industry Application Society. LA - English DB - MTMT ER - TY - THES AU - Vass-Várnai, András TI - New Methods for the Investigation of Modern Electronics Packaging Materials Using Thermal Transient Measurements PB - Budapesti Műszaki és Gazdaságtudományi Egyetem PY - 2017 SP - 92 UR - https://m2.mtmt.hu/api/publication/3412157 ID - 3412157 N1 - Megjegyzés-26785493 Budapeti Műszaki és Gazdaságtudományi Egyetem, Villamosmérnöki és Informatikai Kar LA - English DB - MTMT ER - TY - CHAP AU - Fang, Yake AU - Wang, Gang AU - Xiaodan, Chen AU - Wong, Voon Hon AU - Xing, Fu AU - Vass-Várnai, András ED - Poppe, András TI - Detailed analysis of IC packages using thermal transient testing and CFD modelling for communication device applications T2 - 2016 22nd International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC'16) PB - IEEE CY - New York, New York SN - 9781509054503 PY - 2016 SP - 164 EP - 168 PG - 5 DO - 10.1109/THERMINIC.2016.7749046 UR - https://m2.mtmt.hu/api/publication/3177301 ID - 3177301 LA - English DB - MTMT ER - TY - CHAP AU - Attila, Szel AU - Sárkány, Zoltán AU - Bein, Márton AU - Robin, Bornoff AU - Vass-Várnai, András AU - Kerecsen Istvánné Rencz, Márta ED - Paul, Wesling TI - Lifetime estimation of power electronics modules considering the target application T2 - Proceedings of the 31st IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM'15) PB - IEEE CY - New York, New York SN - 9781479986002 PY - 2015 SP - 332 EP - 335 PG - 4 DO - 10.1109/SEMI-THERM.2015.7100183 UR - https://m2.mtmt.hu/api/publication/2911949 ID - 2911949 LA - English DB - MTMT ER - TY - CHAP AU - Attila, Szel AU - Sárkány, Zoltán AU - Bein, Márton AU - Robin, Bornoff AU - Vass-Várnai, András AU - Kerecsen Istvánné Rencz, Márta ED - IEEE, null TI - Mission profile driven component design for adjusting product lifetime on system level T2 - Proceedings of International Conference on Electronics Packaging PB - IEEE CY - New York, New York SN - 9784904090121 PY - 2015 SP - 385 EP - 389 PG - 5 DO - 10.1109/ICEP-IAAC.2015.7111041 UR - https://m2.mtmt.hu/api/publication/2911926 ID - 2911926 LA - English DB - MTMT ER -