@{MTMT:3238978, title = {SmartSSL – okos közvilágítási lámpatest fejlesztése IoT szemlélettel}, url = {https://m2.mtmt.hu/api/publication/3238978}, author = {Horváth, Péter and Timár, András and Hegedüs, János and Szalai, András and Szabó, Tamás and Poppe, András}, booktitle = {Világítástechnikai Évkönyv 2016-2017}, unique-id = {3238978}, abstract = {Az „okos rendszerek” (egy leegyszerűsített definíció szerint) új minőségű funkciókat nyújtanak a korábbi, önálló funkcionalitások integrációja révén. A közvilágítás – hasonlóan a világítástechnika más területeihez – drasztikus változásokon ment/megy keresztül az utóbbi évek “LED-esítése” következtében. A LED-ek, mint fényforrások egyszerű elektronikus vezérelhetősége egy új paradigmaváltást eredményezett: a LED-es világítótestek okos rendszerekbe való integrálását. Az okos rendszerintegráció része pl. a változó környezeti körülményekhez (pl. hőmérséklet) való alkalmazkodás képessége, a fejlett öndiagnosztika és a kommunikáció képessége. Jelen írásunkban egy jelenleg is folyó fejlesztési projektről számolunk be, amelyet az Európai Unió EuroCPS projektje keretén belül végzünk. A projekt célja egy olyan “jövő biztos” rendszer definiálása és használatának demonstrálása, amely nem csak a szokásos, ütemezett és/vagy mozgásérzékelős világításvezérlésre korlátozódik, hanem egy okos városban szükséges egyéb funkciók (pl. a közlekedésben résztvevőkkel való kommunikáció) használatát is lehetővé teszi. A rendszerarchitektúra kialakítását az ún. 7 rétegű OSI (Open Systems Interconnection) modell inspirálta. A fejlesztés elképzelt eredményei egy új ún. kiberfizikai vagy IoT (internet of things – a dolgok internetje) eszköz, amely LED-es közvilágítási lámpatestek integráns része és amely az adott alkalmazási környezetben elérhető tetszőleges fizikai adatkommunikációs csatorna (pl. PLC, WiFi, Zigbee vagy egyéb rádiófrekvenciás összeköttetés) használatát lehetővé teszi a fizikai kommunikációs rétegtől független módon kialakított adatátviteli réteg révén. Az alkalmazási réteg fő funkcionalitása természetesen továbbra is a világításvezérlés (pl. DALI protokollal), de a rendszer egyéb lehetőségeket is biztosít, pl. a környezeti hőmérséklet hatását kompenzáló fényáram-tartást, vagy egyéb kommunikációs lehetőségeket (ön- azonosítás, öndiagnosztikán alapuló részletes állapotjelentés, stb.)}, year = {2017}, pages = {136-143}, orcid-numbers = {Horváth, Péter/0000-0002-5926-6650; Timár, András/0000-0002-4173-1550; Hegedüs, János/0000-0003-4792-6225; Poppe, András/0000-0002-9381-6716} } @inproceedings{MTMT:3200747, title = {Integrating Chip-level Microfluidics Cooling into System Level Design of Digital Circuits}, url = {https://m2.mtmt.hu/api/publication/3200747}, author = {Bognár, György and Takács, Gábor and Pohl, László and Jani, Lázár and Timár, András and Horváth, Péter and Németh, Márton and Poppe, András and Szabó, Péter Gábor}, booktitle = {Proceedings of the 33rd IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM'17)}, doi = {10.1109/SEMI-THERM.2017.7896912}, unique-id = {3200747}, abstract = {In this paper, a novel tool and a methodology are introduced to create a thermally driven digital cell placement capability that considers the cooling capability of the integrated microscale heatsink structures. Normally, the realization of this kind of placement would require time-consuming computation fluid dynamics (CFD) simulations. With the presented solution, the CFD tool can be replaced by a thermal simulator, which incorporates analytical fluid dynamics compact models. By this approach, the determination of the precise local heat transfer coefficient(s) (thus cooling efficiency) can be realized. In addition, the temperature distribution along the microchannels can also be obtained depending on the channel geometries, the thermal properties of the fluid and the wall temperature(s). While this model is integrated into the thermal simulator, it is still needed to be connected to commercial digital IC design tools to unleash its full potential. Therefore, the interfacing tool is also developed that launches either the thermal, the electrical, or logical simulators and placement programs by using the outputs (results) of the other programs as the inputs.}, keywords = {Thermal modelling; Logi-thermal simulation; Microchannel heat sink; ICS; CLOCK DISTRIBUTION NETWORKS; cell-thermal co-simulation; integrated microcooler}, year = {2017}, pages = {77-87}, orcid-numbers = {Bognár, György/0000-0003-4582-3900; Takács, Gábor/0000-0001-8081-1169; Pohl, László/0000-0003-2390-1381; Jani, Lázár/0000-0002-4280-0319; Timár, András/0000-0002-4173-1550; Horváth, Péter/0000-0002-5926-6650; Németh, Márton/0000-0002-3517-5359; Poppe, András/0000-0002-9381-6716; Szabó, Péter Gábor/0000-0001-7601-743X} } @inproceedings{MTMT:3112159, title = {SmartSSL: application of IoT/CPS design platforms in LED-based street-lighting luminaires}, url = {https://m2.mtmt.hu/api/publication/3112159}, author = {András, Szalai and Tamás, Szabó and Horváth, Péter and Timár, András and Poppe, András}, booktitle = {PROCEEDINGS OF 2016 IEEE LIGHTING CONFERENCE OF THE VISEGRAD COUNTRIES (LUMEN V4)}, doi = {10.1109/LUMENV.2016.7745518}, unique-id = {3112159}, abstract = {Smart systems – according to a simplistic definition – provide new qualities and new functionalities through the integration of formerly distinct functions, components and networks. Street-lighting (as other lighting applications) recently went already through a drastic change offered by “LEDification”. The easy electronic controllability of LEDs as light sources triggered a new change of paradigm: integration of LED based luminaires into smart systems. Smart integration necessitates among others both adaptability to the environmental conditions and intelligent remote control that require a communications systems based on a multi-layer data transfer protocol. We are reporting about an ongoing project that targets a “future proof” solution which is not restricted to lighting control but allows public lighting installations to play key roles in other smart city functions needed in outdoor public spaces such as communications with vehicles. The result of the development is a new IoT device which can be installed in street-lighting luminaires and allows physical layer (e.g. PLC, WiFi, ZigBee or other RF transmission) independent data transfer. The main functionality of the application layer of the protocol remains of course lighting control which is best implemented on the basis of existing standards (such as DALI), but the system allows the implementation of other communications tasks based on other application layer protocols.}, year = {2016}, pages = {65-70}, orcid-numbers = {Horváth, Péter/0000-0002-5926-6650; Timár, András/0000-0002-4173-1550; Poppe, András/0000-0002-9381-6716} } @inproceedings{MTMT:2966153, title = {Novel Semi-Empirical Combined Electro-Thermal Model for Solar Modules}, url = {https://m2.mtmt.hu/api/publication/2966153}, author = {Plesz, Balázs and Kohári, Zsolt and Szabó, Péter Gábor and Timár, András and Bognár, György}, booktitle = {31st European Photovoltaic Solar Energy Conference and Exhibition}, doi = {10.4229/EUPVSEC20152015-5AV.6.26}, unique-id = {2966153}, abstract = {Although there is a wide variety of models for power prediction there are only few models that combine electrical and thermal behaviour of modules and are capable of describing transient behaviour. This paper presents a novel, semi empirical combined electro-thermal model for solar modules. Inputs of the model are the electrical and thermal parameters of the module, and the data describing the ambient conditions. The model consists of three main sub-models. For the calculation of the light conditions from the meteorological data an adopted version of Bird’s clear Sky model is used. The irradiation value received from this sub-model is used in the thermal and the electrical sub-models. Both the electrical and the thermal sub-models represent new approaches in solar module modelling. The thermal model is based on a thermal RC ladder, which has the advantage that the thermal resistances and heat capacities can be determined directly by measurements (e. g. thermal transient measurement) or simulations of the solar module structure. This approach is universal, and can be utilized practically for all types of solar modules. Due to the incorporation of the heat capacitance into the thermal model the transitions between steady states can also be modelled. The electrical model is a semi-empirical model that utilizes the Lambert W function based solution of the single-diode model extended with series and shunt resistances. Since most solar cell types can be described with an exponential curve, this model approach can be regarded as universal. The temperature and irradiance dependence is described by temperature and irradiance dependent model coefficients (photocurrent, reverse saturation current, ideality factor, series and shunt resistance). These temperature and irradiance dependent parameters can be derived from I-V curve measurements obtained at different light intensities and temperatures under laboratory conditions or long-term outdoor I-V curve measurements. The other new approach of the electric model is that it delivers I-V curves instead of only giving an approximation for the maximum power or the efficiency, thus practically all important solar cell parameters can be derived from the model for any desired power point.}, year = {2015}, pages = {2022-2026}, orcid-numbers = {Kohári, Zsolt/0000-0002-9908-6291; Szabó, Péter Gábor/0000-0001-7601-743X; Timár, András/0000-0002-4173-1550; Bognár, György/0000-0003-4582-3900} } @article{MTMT:2694247, title = {Temperature dependent timing in standard cell designs}, url = {https://m2.mtmt.hu/api/publication/2694247}, author = {Timár, András and Kerecsen Istvánné Rencz, Márta}, doi = {10.1016/j.mejo.2013.08.016}, journal-iso = {MICROELECTRON J}, journal = {MICROELECTRONICS JOURNAL}, volume = {45}, unique-id = {2694247}, issn = {0026-2692}, abstract = {This paper proposes a methodology to simulate temperature dependent timing in standard cell designs. Temperature dependent timing characteristics are derived from standard delay format (SDF) files that are created by synthesis tools automatically based on SPICE characterizations. In addition, a fast calculation of temperatures using the equivalent Foster RC network is presented. A case study is also presented in this paper where the temperature dependent frequency variation of a ring oscillator is simulated demonstrating the necessity of temperature dependent timing simulations. An adaptively refineable partitioning method for simulating standard cell designs logi-thermally is proposed as well. This paper also introduces recent enhancements in the CellTherm logi-thermal simulator developed in the Department of Electron Devices, BME, Hungary. Finally, the simulation results are compared and verified with the SPICE compatible ELDO analog simulator from Mentor Graphics.}, year = {2014}, eissn = {0959-8324}, pages = {521-529}, orcid-numbers = {Timár, András/0000-0002-4173-1550; Kerecsen Istvánné Rencz, Márta/0000-0003-4183-3853} } @mastersthesis{MTMT:2944137, title = {Logi-termikus szimuláció sztenderd tervező rendszerekben}, url = {https://m2.mtmt.hu/api/publication/2944137}, author = {Timár, András}, publisher = {Budapest University of Technology and Economics}, unique-id = {2944137}, year = {2013}, orcid-numbers = {Timár, András/0000-0002-4173-1550} } @article{MTMT:2694248, title = {High Resolution Temperature Dependent Timing Model in Digital Standard Cell Designs}, url = {https://m2.mtmt.hu/api/publication/2694248}, author = {Timár, András and Kerecsen Istvánné Rencz, Márta}, doi = {10.1166/jolpe.2013.1282}, journal-iso = {J LOW POW ELECTRONICS}, journal = {JOURNAL OF LOW POWER ELECTRONICS}, volume = {9}, unique-id = {2694248}, issn = {1546-1998}, abstract = {This paper introduces a new temperature dependent timing model that allows designers to deal with accurate temperature dependent delays in logic simulations. In this proposal we present the latest enhancements in the CellTherm logi-thermal simulator developed in the Department of Electron Devices, BME, Hungary. With the proposed accurate temperature dependent timing model thermal effects affecting delays in digital standard cell integrated circuits can be modeled with delay-temperature functions. In order to establish the model preliminary delay-temperature characterization is needed for the standard cells building up the circuit. We propose the extension of the industry standard Liberty format developed by Synopsys with the new model. With the new accurate model we demonstrate that present temperature-timing models do not describe temperature dependent operation sufficiently. In our presented model timing and power data can be parameterized by temperature vectors. It is also demonstrated that taking temperature dependent delays into account allows for more precise power modeling that is critical in low-power nanometer integrated systems.}, year = {2013}, pages = {414-420}, orcid-numbers = {Timár, András/0000-0002-4173-1550; Kerecsen Istvánné Rencz, Márta/0000-0003-4183-3853} } @inproceedings{MTMT:2694246, title = {Logi-thermal simulation using high-resolution temperature dependent delay models}, url = {https://m2.mtmt.hu/api/publication/2694246}, author = {Timár, András and Kerecsen Istvánné Rencz, Márta}, booktitle = {19th International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC 2013)}, doi = {10.1109/THERMINIC.2013.6675214}, unique-id = {2694246}, abstract = {This paper proposes an accurate temperature dependent delay model for logi-thermal simulations. During the logi-thermal simulation of digital integrated circuits the propagation delays of the standard cells can be calculated from delay-temperature functions. The delay-temperature functions contain exact and precise delay values for each input-output path and temperature value. Temperature characterization corners can be specified in arbitrary fine granularity and range. The model presented in this paper overcome the limitation of the classic SDF (Standard Delay Format) models in that propagation delay values can be given for arbitrary temperatures, not only a few corners. With classic SDF, temperature dependence of timing and thus power can only be taken into account for a few design corners. Between characterization corners, like supply voltage, process variation and temperature, linear interpolation must be used for intermediate data. With our proposed delay model temperature- aware timing simulations would produce more accurate results than the classic SDF model. This paper compares the classic SDF delay model with our temperature dependent detailed model and provides evidence through a simple example for the necessity of temperature-aware timing simulation. The logi-thermal simulations are carried out with the CellTherm application developed in the Dept. of Electron Devices, BME, Hungary. A logi-thermal acceleration technique is also introduced in this paper.}, year = {2013}, pages = {376-380}, orcid-numbers = {Timár, András/0000-0002-4173-1550; Kerecsen Istvánné Rencz, Márta/0000-0003-4183-3853} } @article{MTMT:2685344, title = {Real-time heating and power characterization of cells in standard cell designs}, url = {https://m2.mtmt.hu/api/publication/2685344}, author = {Timár, András and Kerecsen Istvánné Rencz, Márta}, doi = {10.1016/j.mejo.2012.03.002}, journal-iso = {MICROELECTRON J}, journal = {MICROELECTRONICS JOURNAL}, volume = {44}, unique-id = {2685344}, issn = {0026-2692}, abstract = {In today's digital electronic integrated circuits device heating is one of the most critical issues. Overheating can cause failures in functionality and device malfunction. In certain circumstances overheating of ICs can cause physical destruction of the device itself. This paper introduces a solution to determine cell and gate heating curves across the standard cell IC's surface. The presented methodology and toolset is tightly integrated into standardized logic simulator engines thus providing digital circuit designers a lowlevel, cell-resolution temperature distribution map during logic simulations. Actual temperatures of each consisting cell of the design can be monitored throughout the whole logic simulation. By being able to monitor temperatures of digital cells during initial simulations, it allows us to detect hot-spots and overheating caused malfunctions far before manufacture. By using the spatial location and temperature magnitude of hot-spots acquired from the presented methodology, place and route (P&R) tools can be driven to change cell placement and routing in order to avoid heating caused failures. Additionally, cooling solutions can be developed using the simulated temperature maps of the IC's surface. This paper also presents various aspects of power characterization methods which were used throughout the experiments.}, year = {2013}, eissn = {0959-8324}, pages = {977-985}, orcid-numbers = {Timár, András/0000-0002-4173-1550; Kerecsen Istvánné Rencz, Márta/0000-0003-4183-3853} } @inproceedings{MTMT:2687414, title = {Yield enhancement by logi-thermal simulation based testing}, url = {https://m2.mtmt.hu/api/publication/2687414}, author = {Nagy, Gergely and Pohl, László and Timár, András and Poppe, András}, booktitle = {18th THERMINIC International Workshop on Thermal Investigations of ICs and Systems}, unique-id = {2687414}, abstract = {This paper proposes a method for yield enhancement in digital integrated circuit manufacture using a temperature dependent logic simulation tool. In an industrial environment the time slot dedicated to the logic testing of a single integrated circuit needs to be as short as possible in order to boost production. During this short period thermally induced errors might remain hidden due to long thermal time constants. This paper introduces a methodology to determine the steadystate die temperature where a short logic test is able to reveal logic faults. The evolved die temperature is simulated with a logi-thermal simulator engine that performs logic simulation by taking self-heating into account. We propose that the testing should take place at an elevated temperature where the temperature dependent failures arise. This approach makes it possible to detect otherwise hidden defects while keeping testing times short.}, year = {2012}, pages = {196-199}, orcid-numbers = {Pohl, László/0000-0003-2390-1381; Timár, András/0000-0002-4173-1550; Poppe, András/0000-0002-9381-6716} }