TY - JOUR AU - Nagy, Gergely AU - Horváth, Péter AU - Pohl, László AU - Poppe, András TI - Advancing the thermal stability of 3D ICs using logi-thermal simulation JF - MICROELECTRONICS JOURNAL J2 - MICROELECTRON J VL - 46 PY - 2015 IS - 12, Part: A SP - 1114 EP - 1120 PG - 7 SN - 0026-2692 DO - 10.1016/j.mejo.2015.06.025 UR - https://m2.mtmt.hu/api/publication/2908301 ID - 2908301 N1 - Megjegyzés-25412368 Megjegyzés-26505942 PN A Issue: 12, Part: A WoS:hiba:000367859500003 2020-08-29 08:48 füzet nem egyezik LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Horváth, Péter AU - Pohl, László AU - Poppe, András ED - Chris, Bailey ED - Kerecsen Istvánné Rencz, Márta ED - Bernhard, Wunderle TI - Advancing the thermal stability of 3D-IC's using logi-thermal simulation T2 - 20th International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC'14) PB - Institute of Electrical and Electronics Engineers (IEEE) CY - New York, New York SN - 9781479954155 PY - 2014 PG - 5 DO - 10.1109/THERMINIC.2014.6972486 UR - https://m2.mtmt.hu/api/publication/2743939 ID - 2743939 N1 - 12_1_1041 Befoglaló mű WoS és MTMT megnevezése nem azonos. Az MTMT-ben 1995 óta standardizált konferenciamegnevezéssel lett a befoglaló mű rögzítve. AB - 3D-ICs have emerged in the past few years. While they solve a large number of problems related to scaling, they also create new ones. Removing the heat from the layers far from the cooling facilities is a great challenge still under intensive research. This paper shows how logi-thermal simulation can be used to predict the operation parameters of large digital systems realized in 3D-ICs. The method can be effectively used to guide place-and-route algorithms and to find the thermal bottlenecks. LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Horváth, Péter AU - Poppe, András ED - Raad, P E ED - Kerecsen Istvánné Rencz, Márta ED - Wunderle, B ED - Poppe, András TI - Practical aspects of thermal transient testing in live digital circuits T2 - 19th International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC 2013) PB - IEEE CY - New York, New York SN - 9781479922710 PY - 2013 SP - 87 EP - 91 PG - 5 DO - 10.1109/THERMINIC.2013.6675227 UR - https://m2.mtmt.hu/api/publication/2695008 ID - 2695008 N1 - Befoglaló mű WoS és MTMT megnevezése nem azonos. Az MTMT-ben 1995 óta standardizált konferenciamegnevezéssel lett a befoglaló mű rögzítve. AB - Thermal Transient Testing is a method practically used to determine the thermal model of an integrated circuit’s case and cooling facilities. The traditional measurement setup of this diagnostic examination does not allow in-circuit testing in case of fully digital semi-custom devices, such as complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs) and programmable system on a chip devices (PSoCs) because it demands an accessible on-chip p-n junction for temperature rise initiation and temperature monitoring. The article presents a proposed novel measurement setup of the thermal transient testing developed for programmable logic devices that implements the required measurement means exploiting the general purpose programmable logic fabric. The main objective of the research is to determine the effects of the interaction between a live digital circuit and the thermal transient testing environment in order to ascertain the feasibility of an on-chip thermal testing facility making possible in- circuit measurements. A simple test environment and the obtained measurement results are presented in order to prove the applicability of the proposed measurement method. The article also presents an application of the logi-thermal simulation method enabling designers to optimize the relative placement of the measurement elements and the user logic. Simulation results showing the application of the method are included in this paper as well. LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Pohl, László AU - Timár, András AU - Poppe, András ED - International, Workshop on Thermal Investigations of ICs and Microstructures TI - Yield enhancement by logi-thermal simulation based testing T2 - 18th THERMINIC International Workshop on Thermal Investigations of ICs and Systems PB - EDA Publishing Association CY - Grenoble SN - 9781467318822 PY - 2012 SP - 196 EP - 199 PG - 4 UR - https://m2.mtmt.hu/api/publication/2687414 ID - 2687414 N1 - Befoglaló mű WoS és MTMT megnevezése nem azonos. Az MTMT-ben 1995 óta standardizált konferenciamegnevezéssel lett a befoglaló mű rögzítve. AB - This paper proposes a method for yield enhancement in digital integrated circuit manufacture using a temperature dependent logic simulation tool. In an industrial environment the time slot dedicated to the logic testing of a single integrated circuit needs to be as short as possible in order to boost production. During this short period thermally induced errors might remain hidden due to long thermal time constants. This paper introduces a methodology to determine the steadystate die temperature where a short logic test is able to reveal logic faults. The evolved die temperature is simulated with a logi-thermal simulator engine that performs logic simulation by taking self-heating into account. We propose that the testing should take place at an elevated temperature where the temperature dependent failures arise. This approach makes it possible to detect otherwise hidden defects while keeping testing times short. LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Poppe, András ED - IEEE, null TI - Simulation Framework for Multilevel Power Estimation and Timing Analysis of Digital Systems Allowing the Consideration of Thermal Effects T2 - Proceedings of the 13th IEEE Latin-American Test Workshop (LATW'12) PB - IEEE CY - Piscataway (NJ) SN - 9781467323550 PY - 2012 SP - 1 EP - 5 PG - 5 DO - 10.1109/LATW.2012.6261250 UR - https://m2.mtmt.hu/api/publication/2684795 ID - 2684795 AB - This paper presents a simulation framework that considers the self-heating of digital blocks and thus helps designers, verification engineers and test engineers to predict or detect thermally sensitive regions and possible signal integrity issues in complex digital designs. Excessively long simulation times due to the fact that thermal simulation is computationally highly intensive are avoided by effective simulation methods and the capability of the architecture to model parts of the system at different levels of abstraction. This allows engineers to simulate the system throughout the entire design phase starting as early as the high-level architectural design. The abilities of the presented environment can be put to use in the design for testing as it helps the placement of test circuitry to spots and regions in an integrated circuit where the risk of developing thermally induced faults is the highest. LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Timár, András AU - Szalai, Albin AU - Kerecsen Istvánné Rencz, Márta AU - Poppe, András ED - Paul, Wesling ED - Kathe, Ericson TI - New simulation approaches supporting temperature-aware design of digital ICs T2 - 2012 28th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM) PB - IEEE CY - New York, New York SN - 9781467311113 T3 - PROCEEDINGS, IEEE SEMICONDUCTOR THERMAL MEASUREMENT AND MANAGEMENTSYMPOSIUM, ISSN 1065-2221 PY - 2012 SP - 313 EP - 318 PG - 6 DO - 10.1109/STHERM.2012.6188866 UR - https://m2.mtmt.hu/api/publication/2683177 ID - 2683177 AB - Regarding thermal issues in digital IC design a major concern is how timing integrity is affected by the elevated junction temperature and temperature gradients on the chip surface. To predict this in a thermal aware design process one needs a dedicated simulation tool in which the logic simulation of the circuit is coupled to the thermal simulation of the chip and its environment. This paper presents two approaches to this so called logi-thermal simulation. In one of our approaches we rely completely on industry standard EDA tools, standard EDA file formats and interfaces. In the other solution which provides us total freedom in the abstraction level of circuit description and simulation accuracy we use our own logic simulation engine. In both cases the logic simulation engine is connected to our own thermal simulation engines which also use compact thermal models of the IC package during simulation. This paper describes certain implementation aspects and features of our logi-thermal simulation solutions, with emphasizes on modeling the thermal properties of the IC packaging. LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Poppe, András ED - Bernard, Courtois ED - Marta, Rencz TI - A Novel Simulation Environment Enabling Multilevel Power Estimation of Digital Systems T2 - Proceedings of the 17th International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC'11) PB - EDA Publishing Association CY - Grenoble SN - 9781457707780 PY - 2011 SP - 149 EP - 152 PG - 4 UR - https://m2.mtmt.hu/api/publication/2668280 ID - 2668280 AB - This paper presents a novel logi-thermal simulator architecture. A logi-thermal simulator encorporates a logic and a thermal core in strong coupling. It is capable of calculating the self-heating of digital blocks and is able to account for the consequences of temperature change by implementing the delays of the blocks as a function of the temperature. The simulator architecture presented is able to work with logic entities described at different levels of abstraction. This allows to simulate a design at a very early phase when only high-level descriptions are available or to simulate systems that have elements in different design phases. Such a feature enables engineers to perform logi-thermal simulation throughout almost the entire design process which allows for the application of multiple-level optimization. It can also be used to shorten simulation times when only some parts of the design need to be simulated in high detail. LA - English DB - MTMT ER - TY - CHAP AU - Gábor, Molnár AU - Nagy, Gergely AU - Szűcs, Zoltán ED - IEEE, null TI - A Novel Procedure and Device to Allow Comprehensive Characterization of Power LEDs over a Wide Range of Temperature T2 - Proceedings of the 14th International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC'08) PB - EDA Publishing Association CY - Grenoble SN - 9782355000089 PY - 2008 SP - 89 EP - 92 PG - 4 DO - 10.1109/THERMINIC.2008.4669885 UR - https://m2.mtmt.hu/api/publication/2626539 ID - 2626539 AB - LEDs are key elements in modern, energy efiicient lighting solutions as well as impose some issues from thermal point of view, since light output and reliability both depend on LEDs' junction temperature. A comprehensive and accurate measurement method is required and demanded by several leader LED manufacturers. Failing a proper combined thermal and radiometric/photometric characterization of LED light sources it is impossible to fulfill the reliability prescriptions for LEDs and to trust the lifetime estimation given in LED datasheets. Light output of LEDs is typically measured in integrating spheres. A key element in such a total flux measurement setup is the appropriate set of standard LEDs which are both current and temperature stabilized and are accompanied with certificate values of their own total flux tracable to primary etalons of national measurement laboratorise. So far there are hardly any such standard LEDs available for the high power range. In this paper we describe the design of such a device (having 5 colors) and describe a modification of the substitution type total flux measurement method which is suitable for an automated, comprehensive measurement of LEDs over a wide range of operating conditions. LA - English DB - MTMT ER - TY - CHAP AU - Nagy, Gergely AU - Horváth, György Gábor AU - Poppe, András ED - IEEE, null TI - Consideration of Thermal Effects in Logic Simulation T2 - Proceedings of the 14th International Workshop on THERMal INvestigation of ICs and Systems (THERMINIC'08) PB - EDA Publishing Association CY - Grenoble SN - 9782355000089 PY - 2008 SP - 229 EP - 234 PG - 6 DO - 10.1109/THERMINIC.2008.4669914 UR - https://m2.mtmt.hu/api/publication/2626538 ID - 2626538 AB - This paper presents a method that considers thermal effects in logic simulations. The aim is to develop a tool that is capable of modeling the thermal behavior of a digital circuit and, at the same time, yields results almost at the speed of ordinary logic simulators. The importance of such a simulation is that thermal effects can be the cause of signal integrity problems. The structure and the basic operation of the simulator are discussed as well as the issues that need to be addressed throughout the development. A detailed description of the implementation of the tightly integrated thermal and logic simulation is also given. LA - English DB - MTMT ER - TY - CHAP AU - Poppe, András AU - Horváth, György Gábor AU - Nagy, Gergely AU - Kerecsen Istvánné Rencz, Márta AU - Székely, Vladimir ED - Wesling, P ED - Erickson, K TI - Electro-thermal and logi-thermal simulators aimed at the temperature-aware design of complex integrated circuits T2 - Proceedings of the 24th IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM'08) PB - IEEE CY - New York, New York SN - 9781424421237 PY - 2008 SP - 68 EP - 76 PG - 9 DO - 10.1109/STHERM.2008.4509369 UR - https://m2.mtmt.hu/api/publication/2613659 ID - 2613659 LA - English DB - MTMT ER -