@inproceedings{MTMT:34264659, title = {Holdover Improvements to the linuxptp Servo for Network Adapters with High-Precision Oscillators}, url = {https://m2.mtmt.hu/api/publication/34264659}, author = {Kovácsházy, Tamás}, booktitle = {2023 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)}, doi = {10.1109/ISPCS59528.2023.10296941}, unique-id = {34264659}, year = {2023}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:34264655, title = {Linuxptp Servo Optimization for Network Adapters with High-Precision Oscillators}, url = {https://m2.mtmt.hu/api/publication/34264655}, author = {Kovácsházy, Tamás and Fodor, Zoltan}, booktitle = {2023 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)}, doi = {10.1109/ISPCS59528.2023.10296994}, unique-id = {34264655}, year = {2023}, pages = {1-6}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:34075566, title = {Execution of Resource Intensive Tasks on a Heterogeneous SoC for Low-Latency Embedded Compute}, url = {https://m2.mtmt.hu/api/publication/34075566}, author = {Fekete, Gábor and Kovácsházy, Tamás}, booktitle = {Proceedings of the 2023 24th International Carpathian Control Conference (ICCC)}, doi = {10.1109/ICCC57093.2023.10178981}, unique-id = {34075566}, year = {2023}, pages = {124-129}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:34075563, title = {Methods of Peripheral Synchronization in Real-Time Cyber-Physical Systems}, url = {https://m2.mtmt.hu/api/publication/34075563}, author = {Wiesner, András and Kovácsházy, Tamás}, booktitle = {Proceedings of the 2023 24th International Carpathian Control Conference (ICCC)}, doi = {10.1109/ICCC57093.2023.10178979}, unique-id = {34075563}, year = {2023}, pages = {465-470}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:34075390, title = {Prototype of Software-Defined Self-Calibrating Temperature Compensated Oscillator}, url = {https://m2.mtmt.hu/api/publication/34075390}, author = {Vozár, Viktor and Kovácsházy, Tamás}, booktitle = {Proceedings of the 2023 24th International Carpathian Control Conference (ICCC)}, doi = {10.1109/ICCC57093.2023.10178976}, unique-id = {34075390}, year = {2023}, pages = {455-460}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:33238448, title = {Synchronization of Sampling in a Distributed Audio Frequency Range Data Acquisition System Utilizing Microcontrollers}, url = {https://m2.mtmt.hu/api/publication/33238448}, author = {Wiesner, András and Kovácsházy, Tamás}, booktitle = {IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication, ISPCS}, doi = {10.1109/ISPCS55791.2022.9918455}, volume = {2022-October}, unique-id = {33238448}, abstract = {Modern distributed audio and video acquisition and processing systems utilize in-band (non-dedicated) network clock and frequency synchronization among nodes to guarantee in phase and in frequency sampling in the system, for example, AVB uses IEEE 802.1AS and Dante specifies IEEE 1588 for network clock synchronization. Synchronizing the hardware clocks of the network interfaces of the nodes of the distributed system is not sufficient in this case as the sampling process itself must be synchronized in frequency and in phase for most of the applications. For this, we need to synchronize the sampling process of A/D and D/A converters to the hardware clock of the network interface (cascade synchronization), which is typically done by tuning dedicated phase-locked loop (PLL) chips to produce the required in-frequency and in-phase clock for the converters. Unfortunately, these PLL chips are expensive, typically they are more expensive then the Microcontroller (MCU) and A/D and D/A chips implementing the system. Therefore, it is reasonable to investigate if it is possible to implement this in system synchronization function utilizing only the built-in peripherals of the MCU, and if it is possible, investigate the achieved performance in detail. In the paper, we present our prototype audio frequency data acquisition system, we introduce the inner algorithms of its synchronization solution utilizing only MCU built-in functions, and investigate the achieved performance. The system uses our open-source flexptp IEEE 1588 implementation (https://github.com/epagris/flexPTP), which is ported to the STM42H743 Cortex-M7 MCU and extended in functionality for this prototype.}, keywords = {clock synchronization; Engineering, Electrical & Electronic; Computer Science, Theory & Methods; Instruments & Instrumentation; Automation & Control Systems; sigma-delta converter; IEE1588; Synchronization of Sampling; I2S Bus Synchronization}, year = {2022}, pages = {1-6}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:33128088, title = {Application Experiment with the Standard Linux Services for Asymmetric Multiprocessing on Heterogeneous System on a Chips}, url = {https://m2.mtmt.hu/api/publication/33128088}, author = {Kovácsházy, Tamás and Fekete, Gabor}, booktitle = {2022 11th Mediterranean Conference on Embedded Computing (MECO)}, doi = {10.1109/MECO55406.2022.9797123}, unique-id = {33128088}, abstract = {Modern System on a Chips (SoC) integrate a diverse set of execution units to process the ever-increasing workloads of new embedded applications, i.e., they are heterogeneous SoCs implementing asymmetric multiprocessing. They include general-purpose application processor cores that run an embedded operating system (OS), such as Linux, and they add microcontrollers to execute real-time tasks such as input-output operations, Digital Signal Processors (DSP) for handling stream data such as video or sound, and Graphics Processing Units capable of General-Purpose Compute (GPGPU). These additional execution units, sometimes also called accelerators, are integrated into the software environment utilizing some specialized OS services and applications, generally with some software framework sitting between the OS and the execution units, hiding all the hardware details about the integration of these execution units on the hardware level. GPGPUs are typically handled by specialized frameworks such as CUDA (Compute Unified Device Architecture) or OpenCL (Open Computing Language) fully defining how the execution units are programmed and managed. However, the other types of additional execution units have different, much more diverse HW coupling to the application processors running the OS (such as shared memory, pipes, etc.), and their programming and execution management models can be also fundamentally different. In this paper, we present our experiments with the standard RemoteProc and RPMsg software frameworks of Linux for asymmetric multiprocessing. We did our evaluation on the TI Sitara AM335x and AM57x SoCs platforms utilizing the Beaglebone Black and AI single board computer boards and we also present some initial performance results on the AM335x platform demonstrating the applicability and limits of these technologies.}, keywords = {Linux; Software framework; Heterogeneous System on a Chip; Asymmetric multiprocessing; RemoteProc; RPMsg}, year = {2022}, pages = {662-667}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:32918784, title = {Distributed Measurement System for Performance Evaluation of Embedded Clock Synchronization Solutions}, url = {https://m2.mtmt.hu/api/publication/32918784}, author = {Wiesner, András and Kovácsházy, Tamás}, booktitle = {2022 23rd International Carpathian Control Conference (ICCC)}, doi = {10.1109/ICCC54292.2022.9805958}, unique-id = {32918784}, abstract = {Distributed, real-time, safety-critical systems gain wide-scale acceptance in the automotive, aerospace, industrial, science, telecommunication, energy distribution, and audio-video distribution applications. In these systems, Time-Sensitive Networking (TSN) can provide the required real-time and reliable communication services. TSN requires precision, hardware-assisted time synchronization provided by the IEEE 802.1AS-Rev or its progenitor, IEEE 1588. IEEE 1588 has a long history in distributed measurement systems, such as vehicular test systems, energy distribution, astrophysics, communication systems such as 4G and 5G, etc. Most modern hardware supports the hardware requirements for IEEE 1588 or IEEE 802.1AS-Rev in some respect; however, software support is very limited on network embedded microcontrollers (MCU), i.e., most modern MCUs do not have open-source, free SW support for time synchronization. We have developed flexPTP (https://github.com/epagris/flexPTP), an open-source, open-licensed PTP implementation for MCUs based on FreeRTOS (embedded real-time OS for MCUs) and lwIP (a TCP/IP stack for MCUs). During the development of the project, we have also created a distributed measurement system for the performance evaluation of flexPTP, which is built into flexPTP. The system can be used during development, but it is also applicable for online monitoring. The data collection component of the distributed measurement system collects data from the MCUs running flexPTP in a lightweight, low resource utilization, platform-independent, MCU-conform way, and forwards the information to a central node, on which data storage, analyses, and presentation can be done. We have also developed a WEB application for online supervision of synchronization in a browser. The system also has a self-discovery feature, allowing developers to identify all nodes capable of running the data collection component of the measurement system. In the paper, we will also present the initial performance evaluation results collected from our implementation. The measurement system can be also adapted to other online and/or offline performance evaluation projects in distributed, embedded systems with some modifications.}, year = {2022}, pages = {293-298}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:32510806, title = {Self-Learnning of the Dynamic, Non-linear Model of Frequency-Temperature Characteristic of Oscillators for Improved Clock Synchronization}, url = {https://m2.mtmt.hu/api/publication/32510806}, author = {Vozar, Viktor and Kovácsházy, Tamás}, booktitle = {2021 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)}, doi = {10.1109/ISPCS49990.2021.9615306}, unique-id = {32510806}, abstract = {The frequency of oscillators depends on a lot of physical parameters; from which, the most influential one is the temperature of the resonator in most of the applications. For example, Temperature Compensated Crystal Oscillators (TCXO) and Owen-Controlled Crystal Oscillators (OCXO) are developed to reduce the frequency variation (drift) of the quartz oscillator due to temperature changes. On the other hand, precision frequency and/or clock synchronization solves the same problem by compensating such temperature- induced frequency variations in slave clocks by synchronizing them to a master clock. However, synchronization may fail, for example, due to communication problems, and the temperature-induced frequency drift becomes a problem again. In addition, steep temperature gradients may also cause problems in some applications as the servo in the synchronization implementation cannot keep the required performance in such situations. In the paper we introduce a solution, which measures the frequencytemperature characteristics of the oscillator during its synchronized state, builds a dynamic, non-linear model of it, and applies the specific model in any case when synchronization cannot be kept to compensate for temperature variations, in essence, we work toward a Software-Defined, Self-Learning TCXO (SD-TCXO). To facilitate this aim, first, we devised a measurement system to collect data about the frequencytemperature characteristics of oscillators, and then we selected, tuned, and validated a dynamic, non-linear system Hammerstein-Wiener model for the tested oscillator. Based on our results, the model improves the temperature variation of standard quartz oscillators by an order of magnitude, just by utilizing added temperatures sensor and some algorithms, easily providing TCXO level performance regarding temperature variations even in holdover situations or in case of steep temperature changes.}, keywords = {OSCILLATOR; Frequency synchronization; clock synchronization; Oscillator model; Software Defined Oscillator}, year = {2021}, pages = {1-6}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} } @inproceedings{MTMT:32510737, title = {Portable, PTP-based Clock Synchronization Implementation for Microcontroller-based Systems and its Performance Evaluation}, url = {https://m2.mtmt.hu/api/publication/32510737}, author = {Wiesner, András and Kovácsházy, Tamás}, booktitle = {2021 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS)}, doi = {10.1109/ISPCS49990.2021.9615250}, unique-id = {32510737}, abstract = {Networked embedded systems are built from nodes utilizing Linux with its diverse network protocol stacks or on network-enabled Microcontrollers (MCU) with embedded operating systems like FreeRTOS with limited networking support. Clock synchronization in the form of IEEE 1588 (Precision Time Protocol, PTP) is also a common requirement in networked embedded systems today. Linux and other high-end embedded operating systems have kernel and application support for PTP, for example, Linux has the PTP Hardware Clock (PHC) kernel infrastructure and linuxptp user-space implementation for this. However, PTP support on embedded operating systems for MCUs is not common; and therefore, portable, good quality, open-source implementations are needed. This paper introduces our PTP based clock synchronization implementation and evaluates its baseline performance on the Texas Instruments TM4C1294 Tiva C network-enabled Cortex-M4F MCU using the Texas Instrument's Connected LaunchPad development board as a hardware environment. Our implementation is built upon FreeRTOS embedded operating system and the LwIP embedded TCP/IP stack, two software components also widely applied by other networkenabled MCU manufacturers in their software packages (such as ST on the STM32F4/F7/H7 line). The implementation abstracts PTP packet timestamping, PPS signal generation, and external HW event timestamping, hopefully guaranteeing good portability. After presenting the software and hardware architecture of our system we also report our initial performance evaluation methodology and results.}, keywords = {clock synchronization; FreeRTOS; Networked embedded systems; IEEE1588 PTP; lwIP; Portable implementation}, year = {2021}, pages = {1-6}, orcid-numbers = {Kovácsházy, Tamás/0000-0001-5424-1588} }