@article{MTMT:3121329,
	title = {Timing Calculations for a General N-Level Dodecagonal Space Vector Structure Using Only Reference Phase Voltages},
	url = {https://m2.mtmt.hu/api/publication/3121329},
	author = {Kaarthik, RS and Gopakumar, K and Cecati, C and Nagy, István},
	doi = {10.1109/TIE.2015.2495283},
	journal-iso = {IEEE T IND ELECTRON},
	journal = {IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS},
	volume = {63},
	unique-id = {3121329},
	issn = {0278-0046},
	abstract = {Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector (SV) structures have advantages like extension of linear modulation range, elimination of fifth and seventh harmonics in phase voltages and currents for the full modulation range including extreme 12-step operation, reduced device voltage ratings, lesser dv/dt stresses on devices and motor phase windings resulting in lower EMI/EMC problems, and lower switching frequency-making it more suitable for high-power drive applications. This paper proposes a simple method to obtain pulsewidth modulation (PWM) timings for a dodecagonal voltage SV structure using only sampled reference voltages. In addition to this, a carrier-based method for obtaining the PWM timings for a general N-level dodecagonal structure is proposed in this paper for the first time. The algorithm outputs the triangle information and the PWM timing values which can be set as the compare values for any carrier-based hardware PWM module to obtain SV PWM like switching sequences. The proposed method eliminates the need for angle estimation, computation of modulation indices, and iterative search algorithms that are typical in multilevel dodecagonal SV systems. The proposed PWM scheme was implemented on a five-level dodecagonal SV structure. Exhaustive simulation and experimental results for steady-state and transient conditions are presented to validate the proposed method.},
	keywords = {MODULATION; SUPPRESSION; BALANCE; STRATEGY; SCHEME; pulsewidth modulation (PWM); multilevel inverters; INDUCTION-MOTOR DRIVE; timing calculations; SV structure; space vector (SV); level shifted carrier; Dodecagonal},
	year = {2016},
	eissn = {1557-9948},
	pages = {1395-1403}
}

@article{MTMT:2993742,
	title = {Novel Solutions for High-Speed Self-Excited Induction Generators},
	url = {https://m2.mtmt.hu/api/publication/2993742},
	author = {Járdán, Rafael Kálmán and Stumpf, Péter Pál and Varga, Zoltán and Nagy, István},
	doi = {10.1109/TIE.2015.2506149},
	journal-iso = {IEEE T IND ELECTRON},
	journal = {IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS},
	volume = {63},
	unique-id = {2993742},
	issn = {0278-0046},
	year = {2016},
	eissn = {1557-9948},
	pages = {2124-2132}
}

@inproceedings{MTMT:3128423,
	title = {Timing calculations for three level dodecagonal space vector structure from reference phase voltages},
	url = {https://m2.mtmt.hu/api/publication/3128423},
	author = {Kaarthik, RS and Gopakumar, K and Cecati, C and Nagy, István},
	booktitle = {41st Annual Conference of the IEEE Industrial Electronics Society, IECON 2015},
	doi = {10.1109/IECON.2015.7392070},
	unique-id = {3128423},
	year = {2015},
	pages = {19-24}
}

@inproceedings{MTMT:3111880,
	title = {A Hybrid Seven Level Inverter Topology with a Single DC Supply and Reduced Switch Count},
	url = {https://m2.mtmt.hu/api/publication/3111880},
	author = {Rahul, SA and Kaarthik, RS and Gopakumar, K and Rajeevan, PP and Franquelo, LG and Leon, JI and Nagy, István},
	booktitle = {2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe)},
	doi = {10.1109/EPE.2015.7309051},
	unique-id = {3111880},
	abstract = {In this paper, a new three-phase hybrid seven level inverter topology with a single DC supply is proposed for the first time. The proposed inverter is realized by cascading two three level flying capacitor inverters with a half bridge module. The inverter topology is having multiple switching state redundancies for each of the pole voltage levels. By using these switching state redundancies, capacitor charging can be controlled in every PWM switching cycle. This feature is advantageous for reducing the capacitor sizing. Another advantage of the proposed inverter is that the charge balancing of each capacitor can be controlled irrespective of modulation index and load power factor. A hysteresis controller based capacitor charge control algorithm is implemented for the proposed inverter. Furthermore, the proposed topology uses lesser number of semiconductor devices, capacitors and DC power supplies compared to conventional seven level inverter topologies. The proposed topology is tested with open loop V/f control scheme in an induction motor drive. Inverter is tested for entire modulation range, and experimental results for steady-state operation are presented for various fundamental frequencies. Experimental results showing the effectiveness of capacitor charge control for both steady state and transient operating conditions are presented.},
	keywords = {Multilevel converters; induction motor; Pulse Width Modulation (PWM); PWM; H-BRIDGE; MOTOR DRIVE; Adjustable speed drive},
	year = {2015}
}

@article{MTMT:3000558,
	title = {A Voltage Space Vector Diagram Formed by Nineteen Concentric Dodecagons for Medium-Voltage Induction Motor Drive},
	url = {https://m2.mtmt.hu/api/publication/3000558},
	author = {Kaarthik, RS and Gopakumar, K and Cecati, C and Nagy, István},
	doi = {10.1109/TIE.2015.2436876},
	journal-iso = {IEEE T IND ELECTRON},
	journal = {IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS},
	volume = {62},
	unique-id = {3000558},
	issn = {0278-0046},
	abstract = {In this paper, a multilevel dodecagonal voltage space vector structure with nineteen concentric dodecagons is proposed for the first time. This space vector structure is achieved by cascading two sets of asymmetric three-level inverters with isolated H-bridges on either side of an open-end winding induction motor. The dodecagonal structure is made possible by proper selection of dc link voltages and switching states of the inverters. The proposed scheme retains all the advantages of multilevel topologies as well as the advantages of dodecagonal voltage space vector structure. In addition to that, a generic and simple method for calculation of pulsewidth modulation timings using only sampled reference values (v(alpha) and v(beta)) is proposed. This enables the scheme to be used for any closed-loop application such as vector control. In addition, a new method of switching technique is proposed, which ensures minimum switching while eliminating the fifth-and seventh-order harmonics and suppressing the eleventh and thirteenth harmonics, eliminating the need for bulky filters. The motor phase voltage is a 24-stepped wave-form for the entire modulation range thereby reducing the number of switchings of the individual inverter modules. Experimental results for steady-state operation, transient operation, including start-up have been presented and the results of fast Fourier transform analysis is also presented for validating the proposed concept.},
	keywords = {DESIGN; PERFORMANCE; Elimination; Converter; Induction motor drive; FLYING CAPACITOR; pulsewidth modulation (PWM); neutral-point-clamped inverter; multilevel inverters; dodecagonal voltage space vector structure; Cascaded H-bridge (CHB)},
	year = {2015},
	eissn = {1557-9948},
	pages = {6748-6755}
}

@inproceedings{MTMT:2995719,
	title = {State Space Control of Quadratic Boost Converter using LQR and LQG approaches},
	url = {https://m2.mtmt.hu/api/publication/2995719},
	author = {Kurucsó, B. and Peschka, A. and Stumpf, Péter Pál and Nagy, István and Vajk, István},
	booktitle = {ACEMP-OPTIM-Electromotion joint conference: 2015 Intl Aegean Conference on Electrical Machines & Power Electronics (ACEMP), 2015 Intl Conference on Optimization of Electrical & Electronic Equipment (OPTIM) & 2015 Intl Symposium on Advanced Electromechanical Motion Systems (ELECTROMOTION)},
	doi = {10.1109/OPTIM.2015.7427003},
	unique-id = {2995719},
	year = {2015},
	pages = {642-648},
	orcid-numbers = {Vajk, István/0000-0002-2818-9162}
}

@inproceedings{MTMT:2991474,
	title = {Dynamics of DFIG controlled by Rotor Side Converter in wind energy},
	url = {https://m2.mtmt.hu/api/publication/2991474},
	author = {Stumpf, Péter Pál and Berei, József and Nagy, István and Vajk, István},
	booktitle = {2015 5TH INTERNATIONAL YOUTH CONFERENCE ON ENERGY (IYCE)},
	doi = {10.1109/IYCE.2015.7180797},
	unique-id = {2991474},
	year = {2015},
	orcid-numbers = {Vajk, István/0000-0002-2818-9162}
}

@article{MTMT:2972564,
	title = {Control of Power Flow Between the Wind Generator and Network},
	url = {https://m2.mtmt.hu/api/publication/2972564},
	author = {Stumpf, Péter Pál and Nagy, István and Vajk, István},
	doi = {10.1109/TIA.2015.2445821},
	journal-iso = {IEEE T IND APPL},
	journal = {IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS},
	volume = {51},
	unique-id = {2972564},
	issn = {0093-9994},
	year = {2015},
	eissn = {1939-9367},
	pages = {4699-4708},
	orcid-numbers = {Vajk, István/0000-0002-2818-9162}
}

@inproceedings{MTMT:2870106,
	title = {Development of a Dedicated Laboratory System for Measurement of Iron Losses in High Speed PMSM},
	url = {https://m2.mtmt.hu/api/publication/2870106},
	author = {Járdán, Rafael Kálmán and Varga, Zoltán and Stumpf, Péter Pál and Nagy, István and Christian, Endisch and Sipos, Péter and Simon, Miklós},
	booktitle = {2015 IEEE International Conference on Industrial Technology, ICIT 2015},
	doi = {10.1109/ICIT.2015.7125181},
	unique-id = {2870106},
	keywords = {STEEL; MOTORS; electrical machines; Loss measurement; Permanent magnet machine; High speed drives},
	year = {2015},
	pages = {708-713}
}

@article{MTMT:3148166,
	title = {Simulation of Basic, Protein-Based Logic Gates},
	url = {https://m2.mtmt.hu/api/publication/3148166},
	author = {Rakos, Balázs and Nagy, István},
	doi = {10.4028/www.scientific.net/AMR.1117.132},
	journal-iso = {ADV MATER RES},
	journal = {ADVANCED MATERIALS RESEARCH},
	volume = {1117},
	unique-id = {3148166},
	issn = {1022-6680},
	year = {2014},
	eissn = {1662-8985},
	pages = {132-135}
}