@book{MTMT:33865389,
	title = {SYSTEMS AND METHODS FOR DOMAIN -SPECIFIC ENHANCEMENT OF REAL - TIME MODELS THROUGH EDGE -BASED LEARNING},
	url = {https://m2.mtmt.hu/api/publication/33865389},
	author = {Anna, E. Csörgő and Magyar, Bálint and Domonkos, Huszár and Márk, Szabó and István, S. Horváth and Horváth, András and Rekeczky, Csaba},
	unique-id = {33865389},
	year = {2022}
}

@book{MTMT:32606820,
	title = {Systems and methods for utilizing modeling to automatically determine configuration parameters for cameras},
	url = {https://m2.mtmt.hu/api/publication/32606820},
	author = {Kiss, Akos and Horvath, Istvan S. and Ruzsa, Peter and Erdosi, Gabor and Babicz, Dora E. and Herson, Andrew W. and Rekeczky, Csaba},
	unique-id = {32606820},
	year = {2021}
}

@book{MTMT:31808500,
	title = {Machine learning-based device placement and configuration service},
	url = {https://m2.mtmt.hu/api/publication/31808500},
	author = {Andrew, W. Herson and Domonkos, Huszar and Istvan, S. Horvath and Christopher, Kennedy and Rekeczky, Csaba},
	unique-id = {31808500},
	year = {2020}
}

@inproceedings{MTMT:30805934,
	title = {Simulation of an Analogue Circuit Solving NP-Hard Optimization Problems},
	url = {https://m2.mtmt.hu/api/publication/30805934},
	author = {Babicz, Dóra Eszter and Tihanyi, Attila and Koller, Miklós and Rekeczky, Csaba and Horváth, András},
	booktitle = {2019 IEEE International Symposium on Circuits and Systems (ISCAS)},
	doi = {10.1109/ISCAS.2019.8702694},
	unique-id = {30805934},
	abstract = {Optimization methods took a leap forward in the past years and with the appearance of deep neural networks and gradient based methods, various complex and differentiable problems become solvable in myriads of practical tasks. Meanwhile optimization of discrete problems is still a challenging task, where efficient solvers are required. In this paper we present a novel analogue circuit in simulation, inspired by the dynamics of cellular neural networks, which can solve NP-hard optimization problems in continuous time. The dynamics were tested in MATLAB and PSPICE and it is shown via moderately complex problems that the dynamics of the circuit converges to the optimal solution in milliseconds with low power consumption.},
	year = {2019},
	pages = {1-5},
	orcid-numbers = {Koller, Miklós/0000-0001-6283-114X}
}

@article{MTMT:30631198,
	title = {Simulation of an Analogue Circuit Solving Constraint Satisfaction Problems},
	url = {https://m2.mtmt.hu/api/publication/30631198},
	author = {Babicz, Dóra Eszter and Rekeczky, Csaba and Horváth, András},
	journal-iso = {PHD PROC PPKE IT},
	journal = {PHD PROCEEDINGS ANNUAL ISSUES OF THE DOCTORAL SCHOOL FACULTY OF INFORMATION TECHNOLOGY AND BIONICS},
	volume = {13},
	unique-id = {30631198},
	issn = {2064-7271},
	year = {2018},
	pages = {60}
}

@article{MTMT:3358097,
	title = {Detection of adversarial attacks using consistency constraints},
	url = {https://m2.mtmt.hu/api/publication/3358097},
	author = {Horváth, András and Csanád, Egervári and Rekeczky, Csaba},
	journal-iso = {PHD PROC PPKE IT},
	journal = {PHD PROCEEDINGS ANNUAL ISSUES OF THE DOCTORAL SCHOOL FACULTY OF INFORMATION TECHNOLOGY AND BIONICS},
	volume = {12},
	unique-id = {3358097},
	issn = {2064-7271},
	year = {2017},
	pages = {53-55}
}

@inproceedings{MTMT:3177817,
	title = {Cellular Vision Based ADAS Applications},
	url = {https://m2.mtmt.hu/api/publication/3177817},
	author = {Horváth, András and Horváth, I and Kiss, Á and Huszár, D and Pálffy, A and Kovács, Lóránt and Babicz, D and Farkas, B and Majoros, G and Rekeczky, Csaba},
	booktitle = {15th International Workshop on Cellular Nanoscale Networks and their Applications},
	unique-id = {3177817},
	year = {2016},
	pages = {1-2},
	orcid-numbers = {Kovács, Lóránt/0000-0001-9930-348X}
}

@inproceedings{MTMT:3188254,
	title = {Embedded Video and Fusion Analytics Solutions for a Global Intelligent Lighting Platform},
	url = {https://m2.mtmt.hu/api/publication/3188254},
	author = {Rekeczky, Csaba},
	booktitle = {Proceedings of the 9th International Conference on Distributed Smart Cameras},
	unique-id = {3188254},
	year = {2015},
	pages = {14-16}
}

@inproceedings{MTMT:2978488,
	title = {Overview of CNN research: 25 years history and the current trends},
	url = {https://m2.mtmt.hu/api/publication/2978488},
	isbn = {9781479983919},
	author = {Zarándy, Ákos and Rekeczky, Csaba and Szolgay, Péter and Chua, LO},
	booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2015},
	doi = {10.1109/ISCAS.2015.7168655},
	unique-id = {2978488},
	year = {2015},
	pages = {401-404}
}

@article{MTMT:2328268,
	title = {A hierarchical vision processing architecture oriented to 3D integration of smart camera chips},
	url = {https://m2.mtmt.hu/api/publication/2328268},
	author = {Carmona-Galán, R and Zarándy, Ákos and Rekeczky, Csaba and Földesy, Péter and Rodríguez-Pérez, A and Domínguez-Matas, C and Fernández-Berni, J and Liñán-Cembrano, G and Pérez-Verdú, B and Kárász, Zoltán and Suárez-Cambre, M and Brea-Sánchez, V and Roska, Tamás and Rodríguez-Vázquez, A},
	doi = {10.1016/j.sysarc.2013.03.002},
	journal-iso = {J SYST ARCHITECT},
	journal = {JOURNAL OF SYSTEMS ARCHITECTURE},
	volume = {59},
	unique-id = {2328268},
	issn = {1383-7621},
	abstract = {This paper introduces a vision processing architecture that is directly mappable on a 3D chip integration technology. Due to the aggregated nature of the information contained in the visual stimulus, adapted architectures are more efficient than conventional processing schemes. Given the relatively minor importance of the value of an isolated pixel, converting every one of them to digital prior to any processing is inefficient. Instead of this, our system relies on focal-plane image filtering and key point detection for feature extraction. The originally large amount of data representing the image is now reduced to a smaller number of abstracted entities, simplifying the operation of the subsequent digital processor. There are certain limitations to the implementation of such hierarchical scheme. The incorporation of processing elements close to the photo-sensing devices in a planar technology has a negative influence in the fill factor, pixel pitch and image size. It therefore affects the sensitivity and spatial resolution of the image sensor. A fundamental tradeoff needs to be solved. The larger the amount of processing conveyed to the sensor plane, the larger the pixel pitch. On the contrary, using a smaller pixel pitch sends more processing circuitry to the periphery of the sensor and tightens the data bottleneck between the sensor plane and the memory plane. 3D integration technologies with a high density of through-silicon-vias can help overcome these limitations. Vertical integration of the sensor plane and the processing and memory planes with a fully parallel connection eliminates data bottlenecks without compromising fill factor and pixel pitch. A case study is presented: a smart vision chip designed on a 3D integration technology provided by MIT Lincoln Labs, whose base process is 0.15 μm FD-SOI. Simulation results advance performance improvements with respect to the state-of-the-art in smart vision chips. © 2013 Elsevier B.V. All rights reserved.},
	keywords = {Vision chips; MOPS/mW; Hierarchical vision; Adapted architectures; 3D integrated circuits},
	year = {2013},
	eissn = {1873-6165},
	pages = {908-919},
	orcid-numbers = {Földesy, Péter/0000-0001-7495-0971}
}