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The proposed inverter is realized by cascading two three level flying capacitor inverters with a half bridge module. The inverter topology is having multiple switching state redundancies for each of the pole voltage levels. By using these switching state redundancies, capacitor charging can be controlled in every PWM switching cycle. This feature is advantageous for reducing the capacitor sizing. Another advantage of the proposed inverter is that the charge balancing of each capacitor can be controlled irrespective of modulation index and load power factor. A hysteresis controller based capacitor charge control algorithm is implemented for the proposed inverter. Furthermore, the proposed topology uses lesser number of semiconductor devices, capacitors and DC power supplies compared to conventional seven level inverter topologies. The proposed topology is tested with open loop V/f control scheme in an induction motor drive. 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