Before the advent of FPGAs (Field Programmable Gate Arrays), hardware acceleration
of networking equipment has been implemented through static architectural elements.
The new generations of these highly flexible FPGA architectures can be reconfigured
on-the-fly, allow parallel processing of data arriving at high-speed, and even contain
hundreds of DSPs (Digital Signal Processors), to further parallelize certain, computationally
intensive tasks. This paper demonstrates some of the capabilities of a new, FPGA-based
networking platform, C-GEP. This multi-purpose, programmable platform can support
various tasks, from being a high-speed switch/router, through pre-processing packets
for Deep Packet Inspection, towards being the Forwarding Plane element in the SDN
infrastructure. The current demonstration contains two further implementations of
100 Gbit/s-capable applications: a traffic generator -- firing off multi-encapsulated
packets - and a lossless traffic monitor - that is able to classify and steer the
monitored traffic to further post-processors.
