The high level synthesis (HLS) tools may result in a multiprocessing structure, where
the time demand of the interchip data transfer (briefly the communication) between
the processing units (hardware or software) is determined exactly only after the task-allocation.
However, a realistic preliminary estimation of the communication time would help to
shape the scheduling and the allocation procedures just for attempting to minimize
the communication times in the final structure. Compared to the task-execution times
of the processing units, especially significant communication times are required by
the serial communication interfaces which are frequently used in microcontroller systems.
This paper presents an estimation method by analysing four well-known serial communication
interfaces (SPI, CAN, I2C, UART).